OCP and JEDEC announce a collaboration – Analysis of high performance computing news
January 24, 2023 – Today, the Open Compute Project Foundation (OCP), the non-profit organization hyperscle, and JEDEC Solid State Technology Association, developer of standards for the microelectronics industry, announce a collaboration to establish a framework for technology transfer captured in a specification approved by OCP to JEDEC for inclusion in one of its standards. This alliance aims to bring together members of the OCP and JEDEC communities to share their efforts in developing and maintaining the global standards necessary to advance the electronics industry.
As part of the alliance, the current effort will be to provide a mechanism to standardize Chiplet part descriptions by leveraging the OCP Chiplet Data Extensible Markup Language (CDXML) specification to be part of JEDEC JEP30: Part Model Guidelines for use with today’s EDA tools. With this updated JEDEC standard, expected to be released in 2023, Chiplet builders will be able to electronically provide a standardized description of Chiplet parts to their customers, paving the way for design and build automation. of System in Package (SiP) using Chiplets. The description will include information needed by SiP builders, such as Chiplet thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing of the Chiplet in the package and security settings.
“One of OCP’s primary efforts centers around the need for specialized compute for AI and ML workloads, which drives the need for specialized silicon. To address the need for specialized silicon while enabling a rapid pace of innovation, we believe that a new open chiplet economy with a low barrier to entry is needed and will require collaboration and standardizations across multiple dimensions, ensuring businesses can interact in an open way efficiently OCP has been investing for several years in the role of catalyst of an open chiplet economy through its Open Domain Specific Architecture (ODSA) project and is pleased to establish this alliance with JEDEC to enable the work carried out in ODSA to be part of a global international standard that advances the industry,” said Cliff Grossner, Ph.D., vice president of market intelligence and i nnovation at the Open Compute Project Foundation.
There are many opportunities to create additional standardization efforts bringing together JEDEC’s strength in setting global standards for the microelectronics industry with OCP’s expertise in specifying system-level devices seeding technologies. and emerging markets, to set new global standards for new device components in emerging markets, eliminating market fragmentation. and unnecessary duplication of effort by market players. “JEDEC is delighted to partner with OCP to support our common goal of providing standards that serve the industry and drive the market forward,” said John Kelly, President of JEDEC. “JEDEC and OCP are united in our belief that standards developed in an open community and industry collaboration are essential to help foster efficient markets.”
“The silicon supply chain is diverse. It is to serve many vertical electronic equipment segments including automotive, personal data processing, data center and enterprise data processing, communications and infrastructure, medical, defense, aerospace and industry. Each market has different value and application specific requirements that must be met. Processor vendors have turned to highly heterogeneous chip platforms to stay competitive. This approach is becoming increasingly complex and expensive to manufacture. In response to these challenges, chipmakers have begun to embrace the use of chips. However, the same diversity that has created the demand for chiplets also makes it unlikely that a single vendor has the vast expertise needed to serve all of these markets. Thus, many different chiplet supply chains will emerge and no one solution will serve all markets. The emerging market around Chiplets will need many players and a low barrier to entry allowing rapid innovation. Open communities that share the effort of building common tools, prototyping, enterprise workflows and standardization are key to accelerating a chip economy,” said Tom Hackenberg, principal analyst, Computing & Software Semiconductor, Memory and Computing Division, Yole Group.
